Интересно за счет чего такой выигрыш, типа “более другие” LSI-контроллеры ?
The DS5000 storage subsystem uses two controllers, connected by an interconnect module.
This section describes the architecture of a single controller. The DS5000 controller uses a
7th generation dedicated ZIP application-specific integrated circuit (ASIC) chip, which is
designed and customized for a particular use, rather than intended for general purpose use.
The new ZIP ASIC is designed for supporting I/O operations, especially for calculating
redundancy information for RAID 3, RAID 5, and RAID 6. The parity can be calculated much
faster by dedicated hardware than by software, which results in good performance, especially
for writing data that is protected by one of the mentioned RAID levels.
The ZIP ASIC chip calculates data in cache, so it uses a fast 17 Gbps bus to cache memory
dedicated for data. The DS5000 controller is based on a PCI Express x8 2 Gbps architecture.
With the ZIP ASIC, there is also an Intel Xeon 2.8 GHz processor with dedicated 2 GB of
memory for I/O control, management, and other general purposes. The ZIP ASIC chip is one
of the most important components in the architecture, so all disk and host chips are directly
connected using fast PCI Express buses to achieve high performance.
---As If, But Not---